Basic Info.
Model NO.
ESP32-PICO-V3-02 Datasheet
WiFi Antenna Type
Built-in
Transmission Rate
151-200Mbps
Certification
RoHS, FCC, CE
Product Description
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Agent Espressif chips esp32 wifi ESP32-PICO-V3-02 Datasheet
ESP32-PICO-V3-02
Datasheet
1Overview
1.1Features
MCU
•ESP32 embedded, Xtensa® dual-core 32-bit LX6 microprocessor, up to 240 MHz
•448 KB ROM for booting and core functions
•520 KB SRAM for data and instructions
•16 KB SRAM in RTC
Wi-Fi
•802.11 b/g/n
•Bit rate: 802.11n up to 150 Mbps
•A-MPDU and A-MSDU aggregation
•0.4 µs guard interval support
•Center frequency range of operating channel: 2412 ~ 2484 MHz
Bluetooth®
•Bluetooth V4.2 BR/EDR and Bluetooth LE specification
•
Class-1, class-2 and class-3 transmitter
•AFH
•CVSD and SBC
Hardware
•Interfaces: ADC, DAC, touch sensor, SD/SDIO/MMC Host Controller, SPI, SDIO/SPI Slave Controller, EMAC, motor PWM, LED PWM, UART, I2C, I2S, infrared remote controller, GPIO, pulse counter, TWAI® (compatible with ISO 11898-1, i.e. CAN Specification 2.0)
•40 MHz crystal oscillator
•8 MB SPI flash
•2 MB SPI PSRAM
•Operating voltage/Power supply: 3.0 ~ 3.6 V
•Operating temperature range: -40 ~ 85 °C
•Dimensions: (7 × 7 × 1.11) mm
1.2Description
The ESP32-PICO-V3-02 is a System-in-Package (SiP) device that is based on ESP32 with ECO V3 wafer, providing complete Wi-Fi and Bluetooth® functionalities. It integrates a 8 MB SPI flash and a 2 MB SPI PSRAM.
At the core of ESP32-PICO-V3-02 is the ESP32 (ECO V3) chip, which is a single 2.4 GHz Wi-Fi and Bluetooth combo chip designed with TSMC's 40 nm low-power technology. ESP32-PICO-V3-02 integrates all peripheral components seamlessly, including a crystal oscillator, flash, PSRAM, filter capacitors and RF matching links in one single package. Its assembly and testing are already done at SiP level. As such, ESP32-PICO-V3-02 reduces the complexity of supply chain and improves control efficiency.
With its ultra-small size, robust performance and low-energy consumption, ESP32-PICO-V3-02 is well suited for any space-limited or battery-operated applications, such as wearable electronics, medical equipment, sensors and other IoT products.
Comparing to other ESP32 series chips, ESP32-PICO-V3-02 has an additional pin GPIO20. For chip security purpose, flash pins DI, DO, /HOLD, /WP and PSRAM pins SI/SIO0, SO/SIO1, SIO2, SIO3 are not led out.
Note:
•For details on ESP32, please refer to the document ESP32 Datasheet.
•For details on ESP32 ECO V3, please refer to ESP32 ECO V3 User Guide.
1.3Applications
•Generic Low-power IoT Sensor Hub
•Generic Low-power IoT Data Loggers
•Cameras for Video Streaming
•Over-the-top (OTT) Devices
•Speech Recognition
•Image Recognition
•Mesh Network
•Home Automation
•Smart Building
•Industrial Automation
•Smart Agriculture
•Audio Applications
•Health Care Applications
•Wi-Fi-enabled Toys
•Wearable Electronics
•Retail & Catering Applications
3.2Pin Description
ESP32-PICO-V3-02 has 48 pins. See pin definitions in Table 1.
Table 1: Pin DefinitionsName | No. | Type | Function |
VDDA | 1 | P | Analog power supply (3.0 V ~ 3.6 V) |
LNA_IN | 2 | I/O | RF input and output |
VDDA3P3 | 3 | P | Analog power supply (3.0 V ~ 3.6 V) |
Name | No. | Type | Function |
VDDA3P3 | 4 | P | Analog power supply (3.0 V ~ 3.6 V) |
SENSOR_VP/I36 | 5 | I | GPIO36, ADC1_CH0, RTC_GPIO0 |
SENSOR_CAPP/I37 | 6 | I | GPIO37, ADC1_CH1, RTC_GPIO1 |
SENSOR_CAPN/I38 | 7 | I | GPIO38, ADC1_CH2, RTC_GPIO2 |
SENSOR_VN/I39 | 8 | I | GPIO39, ADC1_CH3, RTC_GPIO3 |
EN | 9 | I | High: On; enables the SiP Low: Off; the SiP powers off Note: Do not leave this pin floating. |
VDET_1/I34 | 10 | I | ADC1_CH6, RTC_GPIO4 |
VDET_2/I35 | 11 | I | ADC1_CH7, RTC_GPIO5 |
32K_XP/IO32 | 12 | I/O | 32K_XP (32.768 kHz crystal oscillator input), ADC1_CH4, TOUCH9, RTC_GPIO9 |
32K_XN/IO33 | 13 | I/O | 32K_XN (32.768 kHz crystal oscillator output), ADC1_CH5, TOUCH8, RTC_GPIO8 |
IO25 | 14 | I/O | GPIO25, DAC_1, ADC2_CH8, RTC_GPIO6, EMAC_RXD0 |
IO26 | 15 | I/O | GPIO26, DAC_2, ADC2_CH9, RTC_GPIO7, EMAC_RXD1 |
IO27 | 16 | I/O | GPIO27, ADC2_CH7, TOUCH7, RTC_GPIO17, EMAC_RX_DV |
MTMS/IO14 | 17 | I/O | ADC2_CH6, TOUCH6, RTC_GPIO16, MTMS, HSPICLK, HS2_CLK, SD_CLK, EMAC_TXD2 |
MTDI/IO12 | 18 | I/O | ADC2_CH5, TOUCH5, RTC_GPIO15, MTDI, HSPIQ, HS2_DATA2, SD_DATA2, EMAC_TXD3 |
VDD3P3_RTC | 19 | P | Input power supply for RTC IO (3.0 V ~ 3.6 V) |
MTCK/IO13 | 20 | I/O | ADC2_CH4, TOUCH4, RTC_GPIO14, MTCK, HSPID, HS2_DATA3, SD_DATA3, EMAC_RX_ER |
MTDO/IO15 | 21 | I/O | ADC2_CH3, TOUCH3, RTC_GPIO13, MTDO, HSPICS0, HS2_CMD, SD_CMD, EMAC_RXD3 |
IO2 | 22 | I/O | ADC2_CH2, TOUCH2, RTC_GPIO12, HSPIWP, HS2_DATA0, SD_DATA0 |
IO0 | 23 | I/O | ADC2_CH1, TOUCH1, RTC_GPIO11, CLK_OUT1, EMAC_TX_CLK |
IO4 | 24 | I/O | ADC2_CH0, TOUCH0, RTC_GPIO10, HSPIHD, HS2_DATA1, SD_DATA1, EMAC_TX_ER |
NC | 25 | - | NC |
VDD_SDIO | 26 | P | Output power supply. See note 1 under the table. |
IO20 | 27 | I/O | GPIO20. See note 3 under the table. |
SD2/IO9 | 28 | I/O | See note 2, note 3 under the table. |
SD3/IO10 | 29 | I/O | See note 2, note 3 under the table. |
CMD/IO11 | 30 | I/O | See note 2, note 3 under the table. |
CLK/IO6 | 31 | I/O | See note 2, note 3 under the table. |
SD0/IO7 | 32 | I/O | GPIO7, SD_DATA0, HS1_DATA0, U2RTS. See note 3 under the table. |
SD1/IO8 | 33 | I/O | GPIO8, SD_DATA1, HS1_DATA1, U2CTS. See note 3 under the table. |
IO5 | 34 | I/O | GPIO5, VSPICS0, HS1_DATA6, EMAC_RX_CLK |
NC | 35 | - | NC |
NC | 36 | - | NC |
VDD3P3_CPU | 37 | P | Input power supply for CPU IO (1.8 V ~ 3.6 V) |
Name | No. | Type | Function |
IO19 | 38 | I/O | GPIO19, VSPIQ, U0CTS, EMAC_TXD0 |
IO22 | 39 | I/O | GPIO22, VSPIWP, U0RTS, EMAC_TXD1 |
U0RXD/IO3 | 40 | I/O | GPIO3, U0RXD, CLK_OUT2 |
U0TXD/IO1 | 41 | I/O | GPIO1, U0TXD, CLK_OUT3, EMAC_RXD2 |
IO21 | 42 | I/O | GPIO21, VSPIHD, EMAC_TX_EN |
VDDA | 43 | P | Analog power supply (3.0 V ~ 3.6 V) |
NC | 44 | - | NC |
NC | 45 | - | NC |
VDDA | 46 | P | Analog power supply (3.0 V ~ 3.6 V) |
NC | 47 | - | NC |
NC | 48 | - | NC |
Notice:
1.Note that the embedded flash is connected to VDD_SDIO which is driven directly by VDD3P3_RTC through a 6
resistor. Due to this resistor, there is some voltage drop on this pin from VDD3P3_RTC.
2.Pins CMD/IO11 and CLK/IO6 are used for connecting the embedded flash, and pins SD2/IO9 and SD3/IO10 are used for connecting embeded PSRAM. These pins are not recommended for other uses. For details, please see Section 5 Schematics.
3.IO6/IO7/IO8/IO9/IO10/IO11/IO20 belong to VDD_SDIO power domain and cannot work when VDD_SDIO power shuts down.
4.For peripheral pin configurations, please refer to ESP32 Datasheet.3.3Compatibility with ESP32-PICO-V3
ESP32-PICO-V3-02 is a new product but it is very similar to ESP32-PICO-V3. It may be possible to update an ESP32-PICO-V3 hardware design to use ESP32-PICO-V3-02 with minimal or no hardware changes, but please pay attention to the following:
•Usage of the following pins has changed:
Table 2: Usage of Pins on ESP32-PICO-V3-02 and ESP32-PICO-V3
Pin No. | ESP32-PICO-V3-02 (embed- ded flash and PSRAM) | ESP32-PICO-V3 (embedded flash, impossible to connect it with PSRAM) | ESP32-PICO-D4 (embedded flash, possible to connect it with external PSRAM) |
25 | NC | NC | GPIO16, used to connect em- bedded flash |
27 | GPIO20, can be used | GPIO20, can be used | GPIO17, used to connect em- bedded flash |
28 | SD2/IO9, used to connect embedded PSRAM, cannot be used externally | SD2/IO9, can be used | GPIO9, can be used |
Pin No. | ESP32-PICO-V3-02 (embed- ded flash and PSRAM) | ESP32-PICO-V3 (embedded flash, impossible to connect it with PSRAM) | ESP32-PICO-D4 (embedded flash, possible to connect it with external PSRAM) |
29 | SD3/IO10, used to connect embedded PSRAM, cannot be used externally | SD3/IO10, can be used | GPIO10, can be used |
32 | SD0/IO7, can be used | SD0/IO7, can be used | SD0/IO7, used to connect embedded flash |
33 | SD1/IO8, can be used | SD1/IO8, can be used | SD1/IO8, used to connect embedded flash |
35 | NC | NC | GPIO18, can be used |
36 | NC | NC | GPIO23, can be used |
•These three modules vary in size. The size of ESP32-PICO-D4 and ESP32-PICO-V3 is (7 × 7 × 0.94) mm, whereas the size of ESP32-PICO-V3-02 is (7 × 7 × 1.11) mm.
•For security purposes, flash data pins DI, DO, /HOLD, and /WP and PSRAM data pins SI/SIO0, SO/SIO1, SIO2, SIO3 are not led out.
•It is not possible to connect an external PSRAM chip to ESP32-PICO-V3-02 and ESP32-PICO-V3.
•If a 32.768 kHz crystal is connected to ESP32-PICO-D4 then please refer to ESP32 ECO V3 User Guide for information about necessary hardware changes for ESP32-PICO-V3-02 and ESP32-PICO-V3.
•Refer to ESP32 ECO V3 User Guide for information about possible software changes and optimizations for ESP32 ECO V3.
•EMC compliance and RF performance tests should be repeated after a design is updated to use ESP32-PICO-V3-02.
•Refer to ESP32-PICO-V3 Datasheet for more information about ESP32-PICO-V3.
•Refer to ESP32-PICO-D4 Datasheet for more information about ESP32-PICO-D4.
3.4Strapping Pins
ESP32 has five strapping pins: MTDI, GPIO0, GPIO2, MTDO, GPIO5. The pin-pin mapping between ESP32 and the SiP is as follows, which can be seen in Chapter 5 Schematics:
•MTDI = IO12
•GPIO0 = IO0
•GPIO2 = IO2
•MTDO = IO15
•GPIO5 = IO5
Software can read the values of these five bits from register "GPIO_STRAPPING".
During the chip's system reset release (power-on-reset, RTC watchdog reset and brownout reset), the latches of the strapping pins sample the voltage level as strapping bits of "0" or "1", and hold these bits until the chip is powered down or shut down. The strapping bits configure the device's boot mode, the operating voltage of VDD_SDIO and other initial system settings.
Each strapping pin is connected to its internal pull-up/pull-down during the chip reset. Consequently, if a strapping pin is unconnected or the connected external circuit is high-impedance, the internal weak
pull-up/pull-down will determine the default input level of the strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or use the host MCU's GPIOs to control the voltage level of these pins when powering on ESP32.
After reset release, the strapping pins work as normal-function pins. Refer to Table 3 for a detailed boot-mode configuration by strapping pins.
Table 3: Strapping Pins
Voltage of Internal LDO (VDD_SDIO) |
Pin | Default | 3.3 V | 1.8 V |
MTDI | Pull-down | 0 | 1 |
Booting Mode |
Pin | Default | SPI Boot | Download Boot |
GPIO0 | Pull-up | 1 | 0 |
GPIO2 | Pull-down | Don't-care | 0 |
Enabling/Disabling Debugging Log Print over U0TXD During Booting |
Pin | Default | U0TXD Active | U0TXD Silent |
MTDO | Pull-up | 1 | 0 |
Timing of SDIO Slave |
Pin | Default | FE Sampling FE Output | FE Sampling RE Output | RE Sampling FE Output | RE Sampling RE Output |
MTDO | Pull-up | 0 | 0 | 1 | 1 |
GPIO5 | Pull-up | 0 | 1 | 0 | 1 |
Note:
•FE: falling-edge, RE: rising-edge.
•Firmware can configure register bits to change the settings of "Voltage of Internal LDO (VDD_SDIO)" and "Timing of SDIO Slave", after booting.
•The operating voltage of ESP32-PICO-V3-02's integrated external SPI flash and PSRAM is 3.3 V. Therefore, the strapping pin MTDI should hold bit "0" during the SiP power-on reset.
4Electrical Characteristics
4.1Absolute Maximum Ratings
Stresses beyond the absolute maximum ratings listed in the table below may cause permanent damage to the device. These are stress ratings only, and do not refer to the functional operation of the device that should follow the recommended operating conditions.
Table 4: Absolute Maximum Ratings
Symbol | Parameter | Min | Max | Unit |
VDD33 | Power supply voltage | -0.3 | 3.6 | V |
TSTORE | Storage temperature | -40 | 85 | °C |
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